1. Field of the Invention
The present invention relates to a bipolar semiconductor switching device such as a static induction thyristor (hereinafter referred as a SI thyristor), an insulated gate bipolar transistor (hereinafter referred as an IGBT) and a gate turn-off thyristor (hereinafter referred as a GTO) and a manufacturing method thereof.
2. Discussion of Background
FIG. 1 and FIG. 2 are cross sectional views showing structures of conventional buried single gate SI thyristors. The SI thyristor shown in FIG. 1 is of a buffer layer type, which is suitable for high-voltage breakdown operation, and the SI thyristor shown in FIG. 2 is of a shorted emitter type, which is suitable for high speed switching. Such structures are shown in JAPAN ELECTRICAL SOCIETY TECHNICAL REPORT II-249, June 1987 "Trend of a Self-Arc-Suppressing Type Power Semiconductor Device", for example.
Referring to FIG. 1, a cathode region 2, being an N.sup.+ type semiconductor layer of relatively high impurity concentration (i.e., relatively low specific resistance) is provided on one surface of an N.sup.- type semiconductor substrate 1 of relatively low impurity concentration (i.e., relatively high specific resistance). A metal cathode contact 3 is formed on the cathode region 2, and a cathode terminal K is electrically connected to the cathode contact 3. An N.sup.+ type buffer layer 4 of relatively low specific resistance is formed on the other surface of the semiconductor substrate 1, and an anode region 5, being a P.sup.+ type semiconductor layer of relatively low specific resistance, is provided on the buffer layer 4. A metal anode contact 6 is formed on the anode region 5, and an anode terminal A is electrically connected to the anode contact 6. A P.sup.+ type gate region 7 of relatively low specific resistance is buried in the semiconductor substrate 1. The main current flows from the anode region 5 to the cathode region 2 through a channel region 8 surrounded by the P.sup.+ type gate region 7. A metal gate contact 9 is formed on the P.sup.+ type gate region 7, and a gate terminal G is electrically connected to the gate contact 9.
The on/off operation of the SI thyristor is controlled by a forward/reverse bias applied across the cathode and gate terminals K and G. As is well known, a normally on type SI thyristor is in an on-state when a zero bias is applied across the terminals G and K, while it is turned off upon application of a reverse bias. A normally-off type SI thyristor is in an off-state When a zero bias is applied across the terminals G and K, while it is turned on upon application of a forward bias. Although operation of the normally-on type SI thyristor will be hereinafter described as an example, an analogous description exists for a normally-off type SI thyristor.
The main current flows from the anode region 8 to the cathode region 2 through the channel region 8 to maintain the on state of the SI thyristor when a zero or small forward bias is applied across the terminals G and K. In turn-off operation, the channel region 8 is pinched off by a depletion layer spreading from the gate region 7 in response to a reverse bias applied across the terminals and K, to cut off the main current. If the depletion layer reaches the anode region 5, a short circuit is caused across the terminals G and A by the punch through effect. Therefore, an N.sup.+ type buffer layer 4 is employed in order to suppress the extension of the depletion layer to the anode region 5 By virtue of the N.sup.+ type buffer layer 4, G-A main breakdown voltage can be increased. Thus, a high voltage breakdown resistant characteristic is obtained.
On the other hand, the SI thyristor shown in FIG. 2 has a structure suitable for high speed switching rather than high breakdown voltage. Referring to FIG. 2, P.sup.+ type anode regions 5 and N.sup.+ type shorted emitter regions 10 are alternately provided on one surface of an N.sup.- type semiconductor substrate 1. These regions 5 and 10 are short-circuited by an anode contact 6 provided thereon. Other structural components are the same as those of the SI thyristor shown in FIG. 1.
The on/off operation of the SI thyristor of FIG. 2 is basically the same with that shown in FIG. 1. The characteristic operation is such that electrons injected into the substrate 1 from a cathode region 2 directly reach the anode regions 5 and holes are injected into the substrate 1 from the anode regions 5 with high efficiency, in the on state, because the N.sup.+ type buffer layer 4 shown in FIG. 1 has been deleted. Thus, both the turn-on time and the "on" resistance are reduced. Further, in the turn off transition period, electrons remaining in an undepleted region after the pinch-off of channel region 8 can easily flow into the shorted emitter regions 10, since these regions 10 have a positive potential. Consequently, holes remaining in the same region are rapidly ejected into gate region 7 and the anode regions 5. Thus, the turn-off time is also improved. Thus, high speed switching and low "on" resistance characteristics are obtained.
In conventional power bipolar semiconductor switching devices such as the hereinbefore described SI thyristor, the high voltage breakdown characteristic and the high speed switching characteristic and low "on" resistance characteristic are in a so-called trade off relationship, i.e., a relationship where the particular use of the device requires the adjustment of the priority among the three characteristics, as hereinafter described in detail.
In order to obtain the high speed switching and low "on" resistance characteristics by the SI thyristor having the structure shown in FIG. 1, the impurity concentration of the anode region 5 must be significantly higher than that of the anode regions 5 of the SI thyristor shown in FIG. 2. However, this is difficult to achieve for the following reason. In general, the anode region 5 of the SI thyristor shown in FIG. 1 is formed through one of the following alternative processes: (i) First, the N.sup.+ type buffer layer 4 is epitaxially grown on one surface of the substrate 1, and then the P.sup.+ type anode region 5 is epitaxially grown thereon. (ii) First, the N.sup.+ type buffer layer 4 is epitaxially grown on one surface of the substrate 1, and then P type impurities are diffused into the N.sup.+ type buffer layer 4 to form the P.sup.+ type anode region 5. (iii) First, N type impurities are diffused from one surface of the substrate 1 to form the N.sup.+ type buffer layer 4, and then P type impurities are diffused into the N.sup.+ type buffer layer 4 to form the P.sup.+ type anode layer 5.
The processes of the items (i) and (ii) require an epitaxial growth step, and hence they are more difficult to implement and require more time and more expensive than the shorted emitter structure shown in FIG. 2. During the processes (ii) and (iii), the P type anode region 5 must be formed through the step of double diffusion of type impurities into the N.sup.+ type buffer layer 4 having high impurity concentration, and hence it is difficult to sufficiently enhance the impurity concentration in the anode region. Therefore, SI thyristors having the structure shown in FIG. 1 are invariably suited only for the high breakdown voltage characteristic
On the other hand, in order to obtain the high breakdown voltage characteristic by the SI thyristor having the structure shown in FIG. 2, (a) the surface area and the impurity concentration of the anode regions 5 must be reduced to suppress the carrier injection from the anode regions 5, or (b) the N.sup.- type substrate 1 must be increased in thickness to accept extension of the depletion layer. In the case of the item (a), the high speed turn-on and the low "on" resistance characteristics are spoiled. In the case of the item (b), the high speed turn-off characteristic is spoiled by increment of the absolute number of surplus carriers in the off state, and the device itself becomes large in thickness. Therefore, the SI thyristor having the structure shown in FIG. 2 is invariably suitable only for high speed switching and low "on" resistance characteristics.
Thus, in the conventional power bipolar semiconductor switching device, the high breakdown voltage characteristics and the high speed switching and low "on" resistance characteristics are incompatible, and hence it is hard to accomplish a trade-off between them.